Wireless communication continues to increase in popularity, driving up the demand for wireless bandwidth. This has caused the spectrum at lower frequencies to become crowded. The need to be able to utilize additional spectrum at higher millimeter-wave frequencies has become critical. At the same time, the maximum operating frequencies of transistors, fmax, for example CMOS devices, have increased through transistor scaling to the point where it is feasable to integrate an entire transmitter system on a chip. However, there are several obsticles to overcome using technologies such as CMOS at these frequencies. In addition, because an efficient antenna must be at least around λ/2 in dimension, traditional antennas were fabricated off chip, and connected to the rest of the transmitter through a printed circuit board (pcb) or cable.
Traditional RF circuit design divides all circuit functionality into blocks, representing baseband circuitry, mixers, oscillators, phase rotators, amplifiers and antennas. Each block is designed separately, and the blocks are connected, often through only one connection, which can be either a single ended connection or a differential connection. Because the antenna is commonly fabricated off chip, and requires an external connection, most antennas have a single drive point, requiring a single output from the power amplifier.
However, integrated power generation and particularly radiation present several challenges ranging from on-chip power combining and impedance matching to off-chip power transfer. The traditional power transfer methods (e.g., bonding wires and solder balls or solder bumps) to off-chip loads (e.g., external antenna) also become increasingly ineffective.
At the same time, the smaller wavelengths associated with these frequencies opens up the possibility of radiating the power directly from the chip itself, rather than losing significant power by electrically connecting to an off-chip antenna. The low breakdown voltages of integrated silicon transistors encourages the use of large transistors or highly parallel transistors for high power generation, leading to low optimal load impedances from the active driver's perspective. Unfortunately, this directly conflicts with single-port antenna impedance level trade-offs, where a large radiation resistance compared to the loss resistance is preferred for high efficiency.
Among the disadvantages of the traditional approach at these frequencies are the losses incurred in transmission lines and interconnects and the low gain available in amplifier stages. Impedance matching networks on chip often can induce several dB of loss, and efficient inteconnects to an off chip-board or cable are not feasable or rugged enough for mass production. A design approach is needed that can remove as much unnessisary loss in the transmitter chain as possible.
There is a need for improved systems and methods that permit integrated chips to efficiently and effectively radiate power in the millimeter wave regime.